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1 1:1 active hdmi? redriver? with optimized equalization & i2c bufer and rxterm detection circuitry PI3HDMI101-B features ?? supply voltage, vdd = 3.3v 5% ?? support for both dvi and hdmi? signals ?? supports both ac-coupled and dc-coupled inputs ?? supports deepcolor? ?? high performance, up to 2.5 gbps per channel ?? 5v tolerance on i 2 c path ?? integrated 50-ohm ( 10% ) termination resistors at each high speed signal input ?? integrated rx termination detection circuit ?? confgurable output swing control (40 0 mv, 50 0 mv, 60 0 mv, 750 mv, 10 0 0 mv ) ?? confgurable pre-emphasis levels (0db, 1.5db, 3.5db, & 6.0db, 9.0db) ?? confgurable de-emphasis (0db, -3.5db, -6.0db, -9.5db) ?? optimized equalization ?? s ingle default setting will support all cable lengths ?? 8kv contact esd protection on all input data/clock channels per iec61000-4-2 ?? hot insertion support on output high speed pins & scl/sda pins only ?? propagation delay 1ns ?? high impedance outputs when disabled ?? packaging (pb-free & green): 42-contact tqfn (zh42) description pericom semiconductors PI3HDMI101-B 1:1 active redriver? circuit is targeted for high-resolution video networks that are based on dvi/hdmi? standards and tmds signal processing. te PI3HDMI101-B is an active redriver with hi-z outputs. te device receives diferential signals from selected video com - ponents and drives the video display unit. tis solution also provides a unique advanced pre-emphasis technique to increase rise and fall times which are reduced during transmission across long distances. each complete hdmi/dvi channel also has slower speed, side band signals, that are required to be switched. pericoms solu - tion provides a complete solution by integrating the side band bufer together with the high speed bufer in a single solution. using equalization at the input of each of the high speed chan - nels, pericom can successfully eliminate deterministic jitter caused by long cables from the source to the sink. te elimina - tion of the deterministic jitter allows the user to use much longer cables (up to 25 meters). te maximum dvi/hdmi bandwidth of 2.5 gbps provides 36- bit deepcolor? support, which is ofered by hdmi revision 1.3. te PI3HDMI101-B also provides enhanced robust esd/eos protection of 8kv, which is required by many consumer video networks today. te optimized equalization provides the user a single optimal setting that can provide hdmi compliance for all cable lengths: 1 meter to 20 meters and color depths of 8bit/ch, or 12bit/ch. pericom also ofers the ability to fne tune the equalization set - tings in situations where cable length is known. for example, if 25 meter cable length is required, pericom's solution can be adjusted to 16db eq to accept 25 meter cable length. using pericom's patent-pending rx termination detection circuit, PI3HDMI101-B can automatically disable its own input 50-ohm termination when no 50-ohm termination is detected in the hdmi rx chipset. if a switch is used between the PI3HDMI101-B and the hdmi rx, our part can detect the 50-ohm termination in the switch to determine if our input should be of or on. ps8956b 03/06/13 advance information - company confidential all trademarks are property of their respective owners. 13-0005
2 pin configuration tmds receiver block in_dx+/-, in_clk+/- k- dd each high speed data and clock input has integrated equalization that can eliminate deterministic jitter caused by input cables. all activity can be confgured using pin strapping. te rx block is designed to receive all relevant signals directly from the hdmi? connector without any additional circuitry, 3 high speed tmds data, 1 pixel clock, and ddc signals. tmds channels have the fol - lowing termination scheme for rx sense support. te switching between 50-ohm termination vs. 250k-ohm termination is done automatically. te PI3HDMI101-B monitors the 50-ohm termination in the rx chipset behind our part, and when this 50-ohm termination is not present, we disable our 50-ohm termination at our input. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 42 41 40 39 18 19 20 21 scl_t vdd gnd out_clk? out_clk+ vdd out_d0? out_d0+ gnd out_d1? out_d1+ vdd out_d2? out_d2+ gnd vdd oc_s3 eq_s0 eq_s1 gnd in_clk? in_clk+ vdd in_d0? in_d0+ gnd in_d1? in_d1+ vdd in_d2? in_d2+ gnd rxsense dcc_en oe oc_s0 oc_s1 oc_s2 iadj scl_r sda_r sda_t gnd ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
3 i 2 c buffer buffert bufferr portr portt iadj,ddc_en the v ol of the buffer r is around 0.2v. the v ol of the buffer t is around 0.7v. functional truth tables iadj external pull-up range h 1k-ohm to 2k-ohm (hdmi spec) l > 3k-ohm (4.7k-ohm typically) ddc_en port t / port r (if no external pull-up resistor l hi-z (i 2 c bufer disable) h (i 2 c bufer enable) ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
4 pin description pin # pin name i/o description 5 8 11 14 in_clk+ in_d0+ in_d1+ in_d2+ i tmds positive inputs 4 7 10 13 in_clk- in_d0- in_d1- in_d2- i tmds negative inputs 3, 9, 15, 24, 30, 36 gnd p ground 18 oe i output enable, active low 41 scl_r i/o ddc clock , source side 40 sda_r i/o ddc data, source side 6, 12, 16, 23, 27, 33, 37 v dd p 3.3v power supply 34 31 28 25 out_clk+ out_d0+ out_d1+ out_d2+ o tmds positive outputs 35 32 29 26 out_clk- out_d0- out_d1- out_d2- o tmds negative outputs 1 2 eq_s0 eq_s1 i equalizer controls, both pins with internal pull-ups 19 20 21 22 oc_s0 oc_s1 oc_s2 oc_s3 i output bufer controls note: all 4 pins have internal pull-ups 17 ddc_en i i 2 c path enable 38 scl_t i/o ddc clock, sink side 39 sda_t i/o ddc data, sink side 42 iadj i high/low voltage selection, depends on i 2 c external pull-up range ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
5 complete high speed input rx block is as follows: (1) reviecer qe htiw reviecer qe htiw reviecer qe htiw reviecer qe htiw eq_s1 eq_s0 in_d0+ in_d0- in_d1+ in_d1- in_d2+ in_d2- dd v 2 2 20 1 1 20 in_+ in_- _d0+ _d0- _d1+ _d1- _d2+ _d2- _+ _- ds ds ds ds _s0 _s1 _s2 _s e id dd_en dd v 2 2 20 1 1 20 dd v 2 2 20 1 1 20 dd v 2 2 20 1 1 20 ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
6 truth table oe function 0 active 1 all tmds outputs are hi-z eq setting value logic table eq_s1 (2) eq_s0 (2) gain (db) 1 1 optimized equalization (default setting) 1 0 8 0 1 3 0 0 15 notes: 1. e xternal pull-ups are required along scl/sda path 2. i nternal 100k-ohm pull-ups truth table 1 oc_s3 (2) oc_s2 (2) oc_s1 (2) oc_s0 (2) vsw ing(mv) pre/de-emphasis 1 1 1 1 500 0db 1 1 1 0 600 0db 1 1 0 1 750 0db 1 1 0 0 1000 0db 1 0 1 1 500 0db 1 0 1 0 500 1.5db 1 0 0 1 500 3.5db 1 0 0 0 500 6db 0 1 1 1 400 0db 0 1 1 0 400 3.5db 0 1 0 1 400 6db 0 1 0 0 400 9db 0 0 1 1 1000 0db 0 0 1 0 666 -3.5db 0 0 0 1 500 -6db 0 0 0 0 333 -9db ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
7 storage temperature .................................................... C65c to +150c supply voltage to ground potential ................................ C0.5v to +4.0v dc input voltage ...............................................................C0.5v to v dd dc output current ....................................................................... 120ma power dissipation ........................................................................... 1.0w note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specifcation is not implied. exposure to ab - solute maximum rating conditions for extended periods may affect reliability. maximum ratings (above which useful life may be impaired. for user guidelines, not tested.) recommended operating conditions symbol parameter min. ty p. max. units v dd supply voltage 3.135 3.3 3.465 v t a operating free-air temperature 0 70 c tmds diferential pins v id receiver peak-to-peak diferential input voltage 150 1560 mvp-p v ic input common mode voltage 2 v dd + 0.01 v v dd tmds output termination voltage 3.135 3.3 3.465 v r t termination resistance 45 50 55 ohm signaling rate 0 2.5 gbps control pins (oc_sx, eq_sx, oe , ddc_en) v ih lvttl high-level input voltage 2 v dd v v il lvttl low-level input voltage gnd 0.8 ddc pins (scl_r, scl_t, sda_r, sda_t) v i(ddc) input voltage gnd 5.5 v i 2 c pins (scl_t, sda_t) v ih high-level input voltage 0.7 x v dd 5.5 v v il low-level input voltage -0.5 0.3 x v dd v v icl low-level input voltage contention (1) -0.5 0.4 v i 2 c pins (scl_r, sda_r) v ih high-level input voltage 0.7 x v dd 5.5 v v il low-level input voltage -0.5 0.3 x v dd v notes: 1. v il specifcation is for the frst low level seen by the scl/sda lines. v icl is for the second and subsequent low levels seen by the scl_t/sda_t lines. ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
8 item hdmi 1.3 spec pericom product spec operating conditions termination supply voltage, v dd 3.3v 5% 3.30 5% terminal resistance 50-ohm 10% 45 to 55-ohm source dc characteristics at tp1 single-ended high level output voltage, vh v dd 10mv v dd 10mv single-ended low level output voltage, vl ( v dd - 600mv) vl ( v dd - 40 0mv) ( v dd - 600mv) vl ( v dd - 40 0mv) single-ended output swing voltage, vswing 400mv vswing 600mv 400mv vswing 600mv single-ended standby (of) output voltage, vof v dd 10mv v dd 10mv transmitter ac characteristics at tp1 risetime/falltime (20%-80%) 75ps risetime/falltime 0.4 tbit (75ps tr/tf 242ps) @ 1.65 gbps 240ps intra-pair skew at transmitter connector, max 0.15 tbit (90.9ps @ 1.65 gbps) 60ps max inter-pair skew at transmitter connector, max 0.2 tpi xel (1.2ns @ 1.65 gbps) 100ps max clock jitter, max 0.25 tbit (151.5ps @ 1.65 gbps) 82ps max sink operating dc characteristics at tp2 input diferential voltage level, vdif 150 vdif 120 0mv 150mv v diff 120 0mv input common mode voltage level, v icm ( v dd - 300mv) vicm ( v dd - 37.5mv) or v dd 10% ( v dd - 300mv) vicm ( v dd - 37.5mv) or v dd 10% sink dc characteristics when source disabled or disconnected at tp2 diferential voltage level v dd 10mv v dd 10mv tmds compliance test results ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
9 symbol parameter test conditions min. ty p. (1) max. units i cc supply current v ih = v dd , v il = v dd - 0.4v, r t = 50-ohm, v dd = 3.3v data inputs = 1.65 gbps hdmi data pattern clk inputs = 165 mhz clock oc_sx = low, x = 0,1,2,3 120 ma p d power dissipation 400 mw i ccq standby current oe = high, v dd = 3.3v, rxsense = low 8 ma tmds diferential pins v oh single-ended high-level output voltage v dd = 3.3v, r t = 50-ohm pre-emphasis/de-emphasis = 0db v dd - 10 v dd + 10 mv v ol single-ended low-level output voltage v dd - 600 v dd - 400 v swing single-ended output swing voltage 400 600 v od(o) overshoot of output diferential volt- age 6% 15% 2x v swing v od(u) undershoot of output diferential voltage 12% 25% v oc(ss) change in steady-state common-mode output voltage between logic states 0.5 5 mv |i (os) | short circuit output current 12 ma v ode(ss) steady state output diferential voltage oc_sx = gnd, data inputs = 250 mbps hdmi data pattern, 25 mhz pixel clock 560 840 mvp-p v ode(pp) peak-to-peak output diferential voltage 800 1200 v i(open) single-ended input voltage under high impedance input or open input i i = 10a v dd - 10 v dd + 10 mv r int input termination resistance v in = 2.9v 45 50 55 ohm control pins ( oe , ddc_en, iadj) i ih high-level digital input current v ih = 2v or v dd -10 10 a i il low-level digital input current v i = gnd or 0.8 v -10 10 a i 2 c pins (scl_t, sda_t) (t port) i ikg input leakage current v i = 5.5 v -50 50 a v i = v dd -20 20 i oh high-level output current v o = 3.6 v -10 10 a i il low-level input current v il = gnd -40 40 a v ol low-level output voltage i ol = 2.5 ma iadj = h 0.65 0.9 v electrical characteristics (over recommended operating conditions unless otherwise noted) (ale ontinued) ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
10 switching characteristics (over recommended operating conditions unless otherwise noted) symbol parameter test conditions min. ty p. (1) max. units tmds diferential pins tpd propagation delay v dd = 3.3v, r t = 50-ohm, pre-emphasis/de-emphasis = 0db 2000 ps t r diferential output signal rise time (20% - 80%) 75 240 t f diferential output signal fall time (20% - 80%) 75 240 t sk(p) pulse skew 10 50 t sk(d) intra-pair diferential skew 23 50 t sk(o) inter-pair differential skew (2) 100 t jit(pp) peak-to-peak output jitter from tmds clock channel pre-emphasis/de-emphasis = 0db, data inputs = 1.65 gbps hdmi data pattern clk input = 165 mhz clock 15 30 t jit(pp) peak-to-peak output jitter from tmds data channel 18 50 t de de-emphasis duration de-emphasis = -3.5db, data inputs = 250 mbps hdmi data pattern, clk output = 25 mhz clock 240 i 2 c pins (scl_r, sda_r) (r port) i ikg input leakage current v i = 5.5 v -50 50 a v i = v dd -20 20 i oh high-level output current v o = 3.6 v -10 10 a i il low-level input current v il = gnd -10 10 a v ol low-level output voltage i ol = 4 ma, i adj = h 0.2 v c i input capacitance v i = 5.0 v or 0 v, freq = 100khz 25 pf v i = 3.0 v or 0 v, freq = 100khz 10 symbol parameter test conditions min. ty p. (1) max. units c io input/output capacitance v i = 5.0 v or 0 v, freq = 100khz 25 pf v i = 3.0 v or 0 v, freq = 100khz 10 v oh(ttl) 1 ttl high-level output voltage i oh = -8 ma 2.4 v v ol(ttl) 1 ttl low-level output voltage i ol = 8 ma 0.4 v note: 1. voh/vol of external driver at the r and t ports. electrical characteristics (cont..) (table continued) ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
11 symbol parameter test conditions min. ty p. (1) max. units t sx select to switch output 10 ns t en enable time 200 t dis disable time 10 i 2 c pins (scl_r, sda_r, scl_t, sda_t) t plh propagation delay time, low-to-high-level output scl_t/sda_t to scl_r/sda_r iadj = v dd c load = 300 pf tbuffer : rpu = 2k, vpu = 3.0v 500 ns t phl propagation delay time, high-to-low-level output scl_t/sda_t to scl_r/sda_r 136 t plh propagation delay time, low-to-high-level output scl_t/sda_t to scl_r/sda_r rbuffer : rpu = 1.2k, vpu = 3.3v or rpu = 1.8k, vpu = 5v iadj = gnd c load = 100 pf 450 t phl propagation delay time, high-to-low-level output scl_t/sda_t to scl_r/sda_r 136 t r scl_t/sda_t output signal rise time see fig. a 999 t f scl_t/sda_t output signal fall time 90 t r scl_r/sda_r output signal rise time 999 t f scl_r/sda_r output signal fall time 90 switching characteristics (cont..) ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
12 symbol parameter test conditions min. ty p. max. units t set enable to start condition 6 10 ns t hold enable afer stop condition 6 10 pulse genera to r d.u.t. v dd 3.3v10% r=1.2k l c=100pf l v in v iout pulse genera to r d.u.t. v dd 3.3v10% r=2k l c=300pf l v in v iout iadj=l iadj=h t f t f 20% 80% 20% 80% t phl t plh rscl/rsda input tscl/tsda input v dd v cc /2 0.1v 3.3v10% 1.5v v ol t f t f 20% 80% 20% 80% t phl t plh rscl/rsda input tscl/tsda input v dd 1.5v 0.1v 5v10% v ol v dd /2 t plh figure a. i 2 c timing test circuit and defnition ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
13 tmds output oscillation elimination te tmds inputs do not incorporate a squelch circuit. terefore, we recommend the input to be externally biased to prevent output oscillation. one pin will be pulled high to vdd with the other grounded through a 1.5k-ohm resistor as shown. tmds input fail-safe recommendation s s s s y z r t r t av dd v dd a b tmds tmds driver receiver r int r int ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
14 recommended power supply decoupling circuit figure 1 is the recommended power supply decoupling circuit confguration. it is recommended to put 0.1f decoupling capacitors on each vdd pins of our part, there are four 0.1f decoupling capacitors are put in figure 1 with an assumption of only four vdd pins on our part, if there is more or less vdd pins on our pericom parts, the number of 0.1f decoupling capacitors should be adjusted according to the actual number of vdd pins. on top of 0.1f decoupling capacitors on each vdd pins, it is recommended to put a 10f decoupling capacitor near our parts vdd, it is for stabilizing the power supply for our part. ferrite bead is also recommended for isolating the power supply for our part and other power supplies in other parts of the circuit. but, it is optional and depends on the power supply conditions of other circuits. figure 1 recommended power supply decoupling circuit diagram p e r ic o m p a r t v d d v d d v d d v d d from main power supply 0.1f 0.1f 0.1f 0.1f ferrite bead 10f ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
15 requirements on the decoupling capacitors tere is no special requirement on the material of the capacitors. ceramic capacitors are generally being used with typically materi- als of x5r or x7r. layout and decoupling capacitorplacement consideration i. each 0.1f decoupling capacitor should be placed as close as possible to each v dd pin. ii. v dd and gnd planes should be used to provide a low impedance path for power and ground. iii. v ia holes should be placed to connect to v dd and gnd planes directly. iv. t race should be as wide as possible v. t race should be as short as possible. vi. the placement of decoupling capacitor and the way of routing trace should consider the power fowing criteria. vii. 10f capacitor should also be placed closed to our part and should be placed in the middle location of 0.1f capacitors. viii. a void the large current circuit placed close to our part; especially when it is shared the same v dd and gnd planes. since large current fowing on our v dd or gnd planes will generate a potential variation on the v dd or gnd of our part. figure 2 layout and decoupling capacitor placement diagram p e r ic o m p a r t g n d p l a n e v d d p l a n e 0 . 1 u f bypass noise power flow ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005
16 pericom semiconductor corporation ? 1-800-435-2336 ? www .pericom.com ordering information ordering code package code package description PI3HDMI101-Bzhe zh 42-pin, pb-free & green tqfn notes: ? thermal characteristics can be found on the company web site at www .pericom.com/packaging/ ? e = pb-free and green ? adding an x suffx = tape/reel ? hdmi & deepcolor are trademarks of silicon image package mechanical: 42-pin, low profile quad flat package (zh42) date: 11/14/12 description: 42-contact thin fine pitch quad flat no-lead (tqfn) package code: zh42 document control #: pd-2035 revision:d notes: 1. all dimensions are in millimeters. angles in degrees. 2. coplanarity applies to the exposed pad as well as the terminals. 3. refer jedec mo-220. 4. recommended land pattern is for reference only. 5. thermal pad soldering area 12-0529 application information supply voltage all v dd pins are recommended to have a 0.01f capacitor tied from v dd to gnd to flter supply noise tmds inputs standard tmds terminations have already been integrated into pericoms pi3hdm101-a device. therefore, external terminations are not required. any unused port must be left foating and not tied to gnd. ps8956b 03/06/13 PI3HDMI101-B 1:1 active hdmitm redriver? with optimized equalization & i2c bufer and rxterm detection circuitry all trademarks are property of their respective owners. 13-0005

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